Parasitic-compensated quadrature LC oscillator
Boon, Chirn Chye
Do, Manh Anh
Yeo, Kiat Seng
Zhao, R. Y.
Date of Issue2004
School of Electrical and Electronic Engineering
The paper presents a method for improving the phase noise performance of a CMOS quadrature LC oscillator through parasitic compensation. Owing to the parasitic resistance in the inductor, the LC oscillator suffers from a low Q-value, which degrades its phase noise performance. In this design, through the parasitic-compensation method, the LC oscillator will be made to oscillate at the frequencywhen the effective impedance of the parallel LC resonator is at the peak. This will increase the Q-value of the LC resonator, which improves the phase noise performance of the circuit. A 2.63GHz quadrature CMOS LC oscillator with a phase noise of –112.3 dBc/Hz at 600kHz offset is demonstrated, consuming 7.5mW of power using an on-chip spiral inductor model.
DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
IEE proceedings circuits devices and systems
© 2004 IEE. This is the author created version of a work that has been peer reviewed and accepted for publication by IEE Proceedings Circuits Devices and Systems, Institution of Electrical Engineers. It incorporates referee’s comments but changes resulting from the publishing process, such as copyediting, structural formatting, may not be reflected in this document. The published version is available at: [DOI: http://dx.doi.org/10.1049/ip-cds:20040226].