Design and analysis of double-gate MOSFETs for ultra-low power radio frequency identification (RFID) : device and circuit co-design.
Agarwal, Rajendra P.
Kim, Tony Tae-Hyoung.
Date of Issue2011
School of Electrical and Electronic Engineering
Recently, double-gate MOSFETs (DGMOSFETs) have been shown to be more optimal for ultra-low power circuit design due to the improved subthreshold slope and the reduced leakage current compared to bulk CMOS. However, DGMOSFETs for subthreshold circuit design have not been much explored in comparison to those for strong inversion-based design. In this paper, various configurations of DGMOSFETs, such as tied/independent gates and symmetric/asymmetric gate oxide thickness are explored for ultra-low power and high efficient radio frequency identification (RFID) design. Comparison of bulk CMOS with DGMOSFETs has been conducted in ultra-low power subthreshold digital logic design and rectifier design, emphasizing the scope of the nano-scale DGMOSFET technology for future ultra-low power systems. The DGMOSFET-based subthreshold logic improves energy efficiency by more than 40% compared to the bulk CMOS-based logic at 32 nm. Among the various DGMOSFET configurations for RFID rectifiers, symmetric tied-gate DGMOSFET has the best power conversion efficiency and the lowest power consumption.
DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Low power electronics and applications
© 2011 MDPI. This paper was published in Low Power Electronics and Applications and is made available as an electronic reprint (preprint) with permission of MDPI. The paper can be found at DOI: http://dx.doi.org/10.3390/jlpea1020277. One print or electronic copy may be made for personal use only. Systematic or multiple reproduction, distribution to multiple locations via electronic or other means, duplication of any material in this paper for a fee or for commercial purposes, or modification of the content of the paper is prohibited and is subject to penalties under law.