Demonstration of Schottky barrier NMOS transistors with erbium silicided source/drain and silicon nanowire channel
Tan, Eu Jin
Pey, Kin Leong
Chi, Dong Zhi
Chin, Yoke King
Hoe, Keat Mun
Lee, Pooi See
Date of Issue2008
School of Materials Science and Engineering
We have fabricated silicon nanowire N-MOSFETs using erbium disilicide (ErSi2−x) in a Schottky source/drain back-gated architecture. Although the subthreshold swing (~180 mV/dec) and drain-induced barrier lowering (~500 mV/V) are high due thick BOX as gate oxide, the fabricated Schottky transistors show acceptable drive current ~900 μA/μm and high Ion/Ioff ratio (~105). This is attributed to the improved carrier injection as a result of low Schottky barrier height (Φb) of ErSi2−x/n − Si(~0.3 eV) and the nanometer-sized (~8 nm) Schottky junction. The carrier transport is found to be dominated by the metal–semiconductor interface instead of the channel body speculated from the channel length independent behavior of the devices. Furthermore, the transistors exhibit ambipolar characteristics, which are modeled using thermionic/ thermionic-field emission for positive and thermionic-field emission for negative gate biases.
IEEE electron device letters
© 2008 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: http://dx.doi.org/10.1109/LED.2008.2004508.