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|Title:||Demonstration of low-loss on-chip integrated plasmonic waveguide based on simple fabrication steps on silicon-on-insulator platform||Authors:||Tobing, Landobasa Yosef Mario A. L.
Zhang, Dao Hua
|Issue Date:||2012||Source:||Tobing, L. Y. M. A. L., Tjahjana, L., & Zhang, D. H. (2012). Demonstration of low-loss on-chip integrated plasmonic waveguide based on simple fabrication steps on silicon-on-insulator platform. Applied physics letters, 101(4), 041117-.||Series/Report no.:||Applied physics letters||Abstract:||We report the experimental realization of a robust silicon-based plasmonic waveguide structure which can theoretically provide sub-wavelength confinement for Ex- and Ey-polarized surface plasmon polariton modes. Our waveguides exhibit propagation loss as low as 0.2 dB/lm with 50% coupling efficiency.||URI:||https://hdl.handle.net/10356/95033
|ISSN:||0003-6951||DOI:||http://dx.doi.org/10.1063/1.4739523||Rights:||© 2012 American Institute of Physics. This paper was published in Applied Physics Letters and is made available as an electronic reprint (preprint) with permission of American Institute of Physics. The paper can be found at the following official DOI: [http://dx.doi.org/10.1063/1.4739523]. One print or electronic copy may be made for personal use only. Systematic or multiple reproduction, distribution to multiple locations via electronic or other means, duplication of any material in this paper for a fee or for commercial purposes, or modification of the content of the paper is prohibited and is subject to penalties under law.||Fulltext Permission:||open||Fulltext Availability:||With Fulltext|
|Appears in Collections:||EEE Journal Articles|
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