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Title: Design of non-destructive single-sawtooth pulse based readout for STT-RAM by NVM-SPICE
Authors: Wang, Yuhao
Shang, Yang
Yu, Hao
Keywords: DRNTU::Engineering::Electrical and electronic engineering
Issue Date: 2012
Source: Wang, Y., Shang, Y., & Yu, H. (2012). Design of non-destructive single-sawtooth pulse based readout for STT-RAM by NVM-SPICE. 2012 12th Annual Non-Volatile Memory Technology Symposium (NVMTS).
Abstract: Spin-transfer torque random access memory (STTRAM) is one promising candidate for future non-volatile memory based computing, because of its fast access time, high integration density and non-volatility. One major challenge of STT-RAM is to design robust readout circuit in the presence of large MTJ resistance variations. The lack of SPICE-like platform hinders the design validation for hybrid STT-MTJ and CMOS memory structure and readout circuits. In this paper, we have introduced the recently developed NVM-SPICE for the design of STT-RAM with large memory array and also non-destructive single-sawtooth pulse based STT-RAM readout. Compared to the simulation by equivalent circuit, the NVM-SPICE shows 117x faster simulation time for large-array STT-RAM. Moreover, validated by the NVM-SPICE, the proposed single-sawtooth pulse based readout shows 2x faster read latency with 8x larger sensing margin than the existing readout schemes.
DOI: 10.1109/NVMTS.2013.6632865
Rights: © 2012 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: [].
Fulltext Permission: open
Fulltext Availability: With Fulltext
Appears in Collections:EEE Conference Papers

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