Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/100930
Title: Design of a power-efficient CAM using automated background checking scheme for small match line swing
Authors: Do, Anh Tuan
Yin, Chun
Yeo, Kiat Seng
Kim, Tony Tae-Hyoung
Keywords: DRNTU::Engineering::Electrical and electronic engineering
Issue Date: 2013
Source: Do, A. T., Yin, C., Yeo, K. S., & Kim, T. T. H. (2013). Design of a power-efficient CAM using automated background checking scheme for small match line swing. 2013 Proceedings of the ESSCIRC (ESSCIRC).
Abstract: This work reports a fully parallel match-line (ML) structure with an automated background checking (ABC) scheme. MLs are pre-charged by a pulsed current source to minimize power. The proposed ABC scheme monitors the ML sensing using two dummy rows. It digitally adjusts the pulse width and the delay of the search control signals of the CAM without disturbing the normal operation. Therefore, it can continuously track the optimum operating point, making the CAM tolerant to fabrication variations. Additionally, multi-Vt transistors are used in the CAM cell to reduce the leakage by 15× while improving the ML discharge speed by 2× when compared with the standard-Vt devices at 1.2V, 80 oC. The test chip was prototyped using a standard 65 nm CMOS process. The average energy consumption is 0.77 fJ/bit/search at 500 MHz /1.2 V.
URI: https://hdl.handle.net/10356/100930
http://hdl.handle.net/10220/18233
DOI: 10.1109/ESSCIRC.2013.6649109
Rights: © 2013 IEEE. This is the author created version of a work that has been peer reviewed and accepted for publication by Proceedings of the ESSCIRC 2013, IEEE. It incorporates referee’s comments but changes resulting from the publishing process, such as copyediting, structural formatting, may not be reflected in this document. The published version is available at: http://dx.doi.org/10.1109/ESSCIRC.2013.6649109
Fulltext Permission: open
Fulltext Availability: With Fulltext
Appears in Collections:EEE Conference Papers

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