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dc.contributor.authorXiao, Zheen
dc.contributor.authorLuo, Xianshuen
dc.contributor.authorLiow, Tsung-Yangen
dc.contributor.authorLim, Peng Hueien
dc.contributor.authorPrabhathan, Patinharekandyen
dc.contributor.authorZhang, Jingen
dc.contributor.authorLuan, Fengen
dc.identifier.citationXiao, Z., Luo, X., Liow, T.-Y., Lim, P. H., Prabhathan, P., Zhang, J., et al. (2013). Design and characterization of low loss 50 picoseconds delay line on SOI platform. Optics express, 21(18), 21285-21292.en
dc.description.abstractWe design and experimentally demonstrate 50 picoseconds (ps) low loss delay line on 300 nm SOI platform. The delay line unit consists of straight rib waveguide and strip bend section linked by a transition taper waveguide. Low propagation loss of ~0.1 dB/cm is achieved on the straight rib waveguide. With taking into account both low loss and desirable delay, a complete design and characterization process for passive delay line is presented. Our measurement results show that about 0.7 dB excess loss is achievable for 50 ps delay. The loss can be further reduced by adjusting the layout parameters.en
dc.description.sponsorshipASTAR (Agency for Sci., Tech. and Research, S’pore)en
dc.relation.ispartofseriesOptics expressen
dc.rights© 2013 Optical Society of America.en
dc.subjectDRNTU::Engineering::Electrical and electronic engineering::Optics, optoelectronics, photonicsen
dc.titleDesign and characterization of low loss 50 picoseconds delay line on SOI platformen
dc.typeJournal Articleen
dc.contributor.schoolSchool of Electrical and Electronic Engineeringen
dc.contributor.researchResearch Techno Plazaen
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