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|Title:||Modulation of capacitance magnitude by charging/discharging in silicon nanocrystals distributed throughout the gate oxide in MOS structures||Authors:||Gui, D.
Ng, Chi Yung
Tse, Man Siu
|Keywords:||DRNTU::Engineering::Electrical and electronic engineering::Nanoelectronics||Issue Date:||2005||Source:||Gui, D., Ng, C. Y., Chen, T. P., Liu, Y., & Tse, M. S. (2005). Modulation of capacitance magnitude by charging/discharging in silicon nanocrystals distributed throughout the gate oxide in MOS structures. Electrochemical and Solid State Letters, 8(1), G8-G10.||Series/Report no.:||Electrochemical and solid state letters||Abstract:||In this work, charge trapping in silicon nanocrystals (nc-Si) distributed throughout the gate oxide in a metal oxide semiconductor (MOS) structure has been studied. This situation is different from the conventional one with nc-Si confined in a narrow layer embedded in the gate oxide. In the latter, charge trapping in nc-Si leads to a shift in capacitance-voltage characteristic (i.e., a change in the flat-band voltage). In contrast, in the former the charge trapping leads to a dramatic reduction in the MOS capacitance. The original capacitance could be recovered after the release of the trapped charges by a small bias, UV light illumination, or low-temperature thermal annealing.||URI:||https://hdl.handle.net/10356/101350
|ISSN:||1099-0062||DOI:||10.1149/1.1830392||Rights:||Electrochemical and Solid State Letters © copyright 2005 Electrochemical Society. The journal's website is located at http://dx.doi.org.ezlibproxy1.ntu.edu.sg/10.1149/1.1830392||Fulltext Permission:||open||Fulltext Availability:||With Fulltext|
|Appears in Collections:||EEE Journal Articles|
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