Please use this identifier to cite or link to this item:
https://hdl.handle.net/10356/102240
Title: | Complementary logic gate arrays based on carbon nanotube network transistors | Authors: | Gao, Pingqi Zou, Jianping Li, Hong Zhang, Kang Zhang, Qing |
Keywords: | DRNTU::Engineering::Electrical and electronic engineering | Issue Date: | 2013 | Source: | Gao, P., Zou, J., Li, H., Zhang, K., & Zhang, Q. (2013). Complementary logic gate arrays based on carbon nanotube network transistors. Small, 9(6), 813-819. | Series/Report no.: | Small | Abstract: | An efficient technique of fabricating high performance n- and p- type single-walled carbon nanotube (SWNT) network field-effect transistors (NET-FETs) is successfully demonstrated. Complementary inverters, NOR, NAND, OR, AND logic gates have been achieved from integrating these p- and n-type SWNT-NET-FETs. The processing technique described here is fully compatible with conventional silicon microelectronic technologies and it is readily suitable for scalable integration. | URI: | https://hdl.handle.net/10356/102240 http://hdl.handle.net/10220/18923 |
ISSN: | 1613-6810 | DOI: | 10.1002/smll.201201237 | Rights: | © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim. | Fulltext Permission: | none | Fulltext Availability: | No Fulltext |
Appears in Collections: | EEE Journal Articles |
SCOPUSTM
Citations
10
22
Updated on Sep 6, 2020
PublonsTM
Citations
10
20
Updated on Mar 6, 2021
Page view(s) 20
548
Updated on Aug 7, 2022
Google ScholarTM
Check
Altmetric
Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.