Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/104811
Full metadata record
DC FieldValueLanguage
dc.contributor.authorSaha, Sayandeepen
dc.contributor.authorJap, Dirmantoen
dc.contributor.authorBreier, Jakuben
dc.contributor.authorBhasin, Shivamen
dc.contributor.authorMukhopadhyay, Debdeepen
dc.contributor.authorDasgupta, Pallaben
dc.date.accessioned2019-07-11T06:39:20Zen
dc.date.accessioned2019-12-06T21:40:22Z-
dc.date.available2019-07-11T06:39:20Zen
dc.date.available2019-12-06T21:40:22Z-
dc.date.copyright2018-12-01en
dc.date.issued2018en
dc.identifier.citationSaha, S., Jap, D., Breier, J., Bhasin, S., Mukhopadhyay, D., & Dasgupta, P. (2018). Breaking redundancy-based countermeasures with random faults and power side channel. 2018 Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC). doi:10.1109/FDTC.2018.00011en
dc.identifier.urihttps://hdl.handle.net/10356/104811-
dc.identifier.urihttp://hdl.handle.net/10220/49291en
dc.description.abstractRedundancy based countermeasures against fault attacks are a popular choice in security-critical commercial products, owing to its high fault coverage and applications to safety/reliability. In this paper, we propose a combined attack on such countermeasures. The attack assumes a random byte/nibble fault model with existence of side-channel leakage of the final comparison, and no knowledge of the faulty ciphertext. Unlike the previously proposed biased/multiple fault attack, we just need to corrupt one computation branch. Both analytical and experimental evaluation of this attack strategy is presented on software implementations of two state-of-the-art block ciphers, AES and PRESENT, on an ATmega328P microcontroller, via side-channel measurements and a laser-based fault injection. Moreover, this work establishes that even without the knowledge of the faulty ciphertexts, one can still perform differential fault analysis attacks, given the availability of side-channel information.en
dc.format.extent8 p.en
dc.language.isoenen
dc.relation.ispartofseriesen
dc.rights© 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: https://doi.org/10.1109/FDTC.2018.00011en
dc.subjectEngineering::Computer science and engineeringen
dc.subjectFault Attacken
dc.subjectSide-Channelen
dc.titleBreaking redundancy-based countermeasures with random faults and power side channelen
dc.typeConference Paperen
dc.contributor.conference2018 Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC)en
dc.identifier.doihttps://doi.org/10.1109/FDTC.2018.00011en
dc.description.versionAccepted versionen
dc.identifier.rims212670en
item.grantfulltextopen-
item.fulltextWith Fulltext-
Appears in Collections:TL Conference Papers
Files in This Item:
File Description SizeFormat 
submitted.pdf462.97 kBAdobe PDFThumbnail
View/Open

Google ScholarTM

Check

Altmetric

Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.