Obfuscation and watermarking of FPGA designs based on constant value generators

Abstract

Obfuscation is a technique which makes design less intelligible in order to prevent or increase reverse engineering effort. In this paper, a new approach to hardware obfuscation by inserting constant value generators (CVGs) is proposed. A CVG is a circuit that generates the same fixed logic value but will not be minimized by the synthesizer. CVGs can be used to create new logic primitives, embed watermarks and introduce fictive interdependencies in the circuit. They help to hide actual design performance information by tricking the synthesizer tools to generate deceiving delay reports through the false paths.