Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/105523
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dc.contributor.authorPeng, L.en
dc.contributor.authorLi, H. Y.en
dc.contributor.authorFan, Jien
dc.contributor.authorGao, Shanen
dc.contributor.authorTan, Chuan Sengen
dc.date.accessioned2013-10-30T04:28:35Zen
dc.date.accessioned2019-12-06T21:52:57Z-
dc.date.available2013-10-30T04:28:35Zen
dc.date.available2019-12-06T21:52:57Z-
dc.date.copyright2012en
dc.date.issued2012en
dc.identifier.citationPeng, L., Fan, J., Li, H. Y., Gao, S., & Tan, C. S. (2012). Simultaneous formation of electrical connection, mechanical support and hermetic seal with bump-less cu-cu bonding for 3D wafer stacking. 2012 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA), 1-2.en
dc.identifier.urihttps://hdl.handle.net/10356/105523-
dc.description.abstractWafer-on-wafer stacking is demonstrated successfully using bump-less Cu-Cu bonding for simultaneous formation of electrical connection, mechanical support and hermetic seal. The mechanical strength of the bonded Cu-Cu layer sustains grinding and chemical etching. Daisy chain of at least 44,000 contacts at 15μm pitch is connected successfully. Cu-Cu hermetic seal ring shows helium leak rate >;10X lower than the reject limit without under-fill. This provides robust IC-to-IC connection density of 4.4 × 105 cm-2 suitable for future wafer level 3D integration.en
dc.language.isoenen
dc.subjectDRNTU::Engineering::Electrical and electronic engineeringen
dc.titleSimultaneous formation of electrical connection, mechanical support and hermetic seal with bump-less Cu-Cu bonding for 3D wafer stackingen
dc.typeConference Paperen
dc.contributor.schoolSchool of Electrical and Electronic Engineeringen
dc.contributor.conferenceInternational Symposium on VLSI Technology, Systems and Application (2012 : Hsinchu, Taiwan)en
dc.identifier.doi10.1109/VLSI-TSA.2012.6210174en
item.fulltextNo Fulltext-
item.grantfulltextnone-
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