Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/105701
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dc.contributor.authorWang, Bingen
dc.contributor.authorLee, Kwang Hongen
dc.contributor.authorWang, Congen
dc.contributor.authorWang, Yueen
dc.contributor.authorMade, Riko I.en
dc.contributor.authorSasangka, Wardhana Ajien
dc.contributor.authorNguyen, Viet Cuongen
dc.contributor.authorLee, Kenneth Eng Kianen
dc.contributor.authorTan, Chuan Sengen
dc.contributor.authorYoon, Soon Fatten
dc.contributor.authorFitzgerald, Eugene A.en
dc.contributor.authorMichel, Jurgenen
dc.contributor.editorEldada, Louay A.en
dc.contributor.editorLee, El-Hangen
dc.contributor.editorHe, Sailingen
dc.date.accessioned2019-08-06T05:58:59Zen
dc.date.accessioned2019-12-06T21:56:07Z-
dc.date.available2019-08-06T05:58:59Zen
dc.date.available2019-12-06T21:56:07Z-
dc.date.issued2017en
dc.identifier.citationWang, B., Lee, K. H., Wang, C., Wang, Y., Made, R. I., Sasangka, W. A., . . . Michel, J. (2017). The integration of InGaP LEDs with CMOS on 200 mm silicon wafers. Proceedings of SPIE - Smart Photonic and Optoelectronic Integrated Circuits XIX, 10107, 101070Y-. doi:10.1117/12.2252030en
dc.identifier.urihttps://hdl.handle.net/10356/105701-
dc.description.abstractThe integration of photonics and electronics on a converged silicon CMOS platform is a long pursuit goal for both academe and industry. We have been developing technologies that can integrate III-V compound semiconductors and CMOS circuits on 200 mm silicon wafers. As an example we present our work on the integration of InGaP light-emitting diodes (LEDs) with CMOS. The InGaP LEDs were epitaxially grown on high-quality GaAs and Ge buffers on 200 mm (100) silicon wafers in a MOCVD reactor. Strain engineering was applied to control the wafer bow that is induced by the mismatch of coefficients of thermal expansion between III-V films and silicon substrate. Wafer bonding was used to transfer the foundry-made silicon CMOS wafers to the InGaP LED wafers. Process trenches were opened on the CMOS layer to expose the underneath III-V device layers for LED processing. We show the issues encountered in the 200 mm processing and the methods we have been developing to overcome the problems.en
dc.format.extent8 p.en
dc.language.isoenen
dc.relation.ispartofseriesProceedings of SPIE - Smart Photonic and Optoelectronic Integrated Circuits XIXen
dc.rights© 2017 SPIE. All rights reserved. This paper was published in Proceedings of SPIE - Smart Photonic and Optoelectronic Integrated Circuits XIX and is made available with permission of SPIE.en
dc.subjectEngineering::Electrical and electronic engineeringen
dc.subjectInGaP LEDen
dc.subjectCMOS Integrationen
dc.titleThe integration of InGaP LEDs with CMOS on 200 mm silicon wafersen
dc.typeJournal Articleen
dc.contributor.schoolSchool of Electrical and Electronic Engineeringen
dc.contributor.conferenceSPIE OPTOen
dc.identifier.doi10.1117/12.2252030en
dc.description.versionPublished versionen
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