Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/105735
Title: FCUDA : CUDA to FPGA high level synthesis
Authors: Nguyen, Quoc Duy Tan
Keywords: DRNTU::Engineering::Computer science and engineering::Data::Data structures
Issue Date: 2014
Source: Nguyen, Q. D. T. (2014). FCUDA : CUDA to FPGA high level synthesis. Student research paper, Nanyang Technological University.
Abstract: This paper serves as a record of debugging the existing CUDA-to-FPGA tool flow (FCUDA) with various benchmarks in order to improve its robustness and efficiency. The paper starts with a brief introduction about the tool, its infrastructure, impact and role to the computing world nowadays. The body of the paper mainly consists of the methodology the author used when testing FCUDA. It also notes all the bugs the author has possibly found and proposed some workable solutions to them. Different existing FCUDA versions will also be discussed. Finally, it concludes with some points for future work and enhancement.
URI: https://hdl.handle.net/10356/105735
http://hdl.handle.net/10220/26042
Rights: © 2014 The Author(s).
Fulltext Permission: open
Fulltext Availability: With Fulltext
Appears in Collections:URECA Papers

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