FCUDA : CUDA to FPGA high level synthesis

Abstract

This paper serves as a record of debugging the existing CUDA-to-FPGA tool flow (FCUDA) with various benchmarks in order to improve its robustness and efficiency. The paper starts with a brief introduction about the tool, its infrastructure, impact and role to the computing world nowadays. The body of the paper mainly consists of the methodology the author used when testing FCUDA. It also notes all the bugs the author has possibly found and proposed some workable solutions to them. Different existing FCUDA versions will also be discussed. Finally, it concludes with some points for future work and enhancement.