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https://hdl.handle.net/10356/105813| Title: | Near-threshold processor design techniques for power-constrained computing devices | Authors: | Zhou, Jun Kim, Tony Tae-Hyoung Lian, Yong |
Keywords: | Near-threshold Processor DRNTU::Engineering::Electrical and electronic engineering Ultra-low Power |
Issue Date: | 2017 | Source: | Zhou, J., Kim, T. T.-H., & Lian, Y. (2017). Near-threshold processor design techniques for power-constrained computing devices. 2017 IEEE 12th International Conference on ASIC (ASICON), 920-923. doi:10.1109/ASICON.2017.8252627 | Abstract: | Ultra-low power digital processors are needed in power-constrained computing devices for IoT, intelligent sensing and wearable computing applications. While near-threshold design is promising to achieve ultra-low power consumption, there are several challenges for this technology to be applied to the design of digital processors, including the functionality issue, performance degradation and variability issue. This paper reviews the existing near-threshold processor design techniques including circuit and architecture level solutions and discuss how the aforementioned issues can be addressed. | URI: | https://hdl.handle.net/10356/105813 http://hdl.handle.net/10220/48762 |
DOI: | 10.1109/ASICON.2017.8252627 | Rights: | © 2017 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: https://doi.org/10.1109/ASICON.2017.8252627 | Fulltext Permission: | open | Fulltext Availability: | With Fulltext |
| Appears in Collections: | EEE Conference Papers |
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| Near-threshold processor design techniques for power-constrained computing devices.pdf | 481.13 kB | Adobe PDF |  View/Open |
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