Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/105819
Title: An area efficient 1024-point low power radix-22 FFT processor with feed-forward multiple delay commutators
Authors: Le Ba, Ngoc
Kim, Tony Tae-Hyoung
Keywords: DRNTU::Engineering::Electrical and electronic engineering
Fast Fourier Transform
Single Delay Feedback
Issue Date: 2018
Source: Le Ba, N., & Kim, T. T.-H. (2018). An area efficient 1024-point low power radix-22 FFT processor with feed-forward multiple delay commutators. IEEE Transactions on Circuits and Systems I: Regular Papers, 65(10), 3291-3299. doi:10.1109/TCSI.2018.2831007
Series/Report no.: IEEE Transactions on Circuits and Systems I: Regular Papers
Abstract: Radix-2k delay feed-back and radix-K delay commutator are the most well-known pipeline architecture for FFT design. This paper proposes a novel radix-22 multiple delay commutator architecture utilizing the advantages of the radix-22 algorithm, such as simple butterflies and less memory requirement. Therefore, it is more hardware efficient when implementing parallelism for higher throughput using multiple delay commutators or feed-forward data paths. Here, we propose an improved input scheduling algorithm based upon memory to eliminate energy required to shift data along the delay lines. A 1024-point FFT processor with two parallel data paths is implemented in 65-nm CMOS process technology. The FFT processor occupies an area of 3.6 mm2 , successfully operates in the supply voltage range from 0.4-1 V and the maximum clock frequency of 600 MHz. For low voltage, high performance applications, the processor is able to operate at 400 MHz and consumes 60.3 mW or 77.2 nJ/FFT generating 800 Msamples/s at 0.6 V supply.
URI: https://hdl.handle.net/10356/105819
http://hdl.handle.net/10220/48771
ISSN: 1549-8328
DOI: 10.1109/TCSI.2018.2831007
Rights: © 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: https://doi.org/10.1109/TCSI.2018.2831007
Fulltext Permission: open
Fulltext Availability: With Fulltext
Appears in Collections:EEE Journal Articles

Files in This Item:
File Description SizeFormat 
An Area Efficient 1024-Point Low Power Radix.pdf1.13 MBAdobe PDFThumbnail
View/Open

Google ScholarTM

Check

Altmetric


Plumx

Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.