Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/105835
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dc.contributor.authorLe, Van Loien
dc.contributor.authorKim, Tony Tae-Hyoungen
dc.date.accessioned2019-06-14T07:25:33Zen
dc.date.accessioned2019-12-06T21:58:58Z-
dc.date.available2019-06-14T07:25:33Zen
dc.date.available2019-12-06T21:58:58Z-
dc.date.issued2018en
dc.identifier.citationLe, V. L., & Kim, T. T.-H. (2018). An Area and Energy Efficient Ultra-Low Voltage Level Shifter With Pass Transistor and Reduced-Swing Output Buffer in 65-nm CMOS. IEEE Transactions on Circuits and Systems II: Express Briefs, 65(5), 607-611. doi:10.1109/TCSII.2018.2820155en
dc.identifier.issn1549-7747en
dc.identifier.urihttps://hdl.handle.net/10356/105835-
dc.description.abstractThis brief presents an ultra-low voltage level shifter (LS) with fast and energy-efficient voltage conversion from the deep subthreshold region to the superthreshold region. The proposed LS achieves better performance and increased energy efficiency by addressing the reduced swing and the slow fall transition issues in prior arts. A novel reduced-swing buffer design is proposed to attain lower standby power consumption while a pass transistor is used for improving the speed of the fall transition. The proposed LS consists of only 11 transistors occupying 7.45 μm 2 , which obtains the smallest area among the state-of-the-art ultra-low voltage LSs. Measurement results from a test chip fabricated in 65-nm CMOS technology demonstrate that the proposed LS shows the maximum leakage and speed improvements of 16.3× and 2.7× compared to the Wilson current mirror LS. The proposed LS also accomplishes the maximum switching energy reduction of 8.5× and can convert deep subthreshold voltage as low as 100 mV to the superthreshold voltage of 1.2 V.en
dc.format.extent5 p.en
dc.language.isoenen
dc.relation.ispartofseriesIEEE Transactions on Circuits and Systems II: Express Briefsen
dc.rights© 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: https://doi.org/10.1109/TCSII.2018.2820155.en
dc.subjectCurrent Mirroren
dc.subjectLevel Shifteren
dc.subjectDRNTU::Engineering::Electrical and electronic engineeringen
dc.titleAn area and energy efficient ultra-low voltage level shifter with pass transistor and reduced-swing output buffer in 65-nm CMOSen
dc.typeJournal Articleen
dc.contributor.schoolSchool of Electrical and Electronic Engineeringen
dc.identifier.doi10.1109/TCSII.2018.2820155en
dc.description.versionAccepted versionen
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