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Title: | Design and realization of low dropout voltage regulator and voltage reference in deep-submicron CMOS for emerging Internet-of-Things and satellites | Authors: | Jiang, Jize | Keywords: | DRNTU::Engineering::Electrical and electronic engineering | Issue Date: | 2018 | Source: | Jiang, J. (2018). Design and realization of low dropout voltage regulator and voltage reference in deep-submicron CMOS for emerging Internet-of-Things and satellites. Doctoral thesis, Nanyang Technological University, Singapore. | Abstract: | This Ph.D. program pertains to the design and realization of two fundamental analog circuits in deep-submicron CMOS – a Low DropOut voltage regulator (LDO) and a voltage reference. The target applications for the LDO and the voltage reference are respectively the emerging Internet-of-Things (IoTs) and both the said IoTs and satellites. Some of the most imperative considerations for the design of contemporary Integrated Circuits (ICs) and Systems-on-Chip (SoCs) for IoTs include a small form factor, complex functionality, yet low power and low cost. These attributes are often realized by employing deep-submicron CMOS processes, e.g., 65nm, resulting in a somewhat challenging operating environment, including a low supply voltage, large thermal gradient, severe noise (coupling), etc. For satellites operating in an extraterrestrial environment, the operating environment for ICs/SoCs is even more challenging due to the extended temperature range and the need for immunity to radiation effects, i.e., ‘radiation-hardened’. | URI: | https://hdl.handle.net/10356/106062 http://hdl.handle.net/10220/47891 |
DOI: | 10.32657/10220/47891 | Fulltext Permission: | open | Fulltext Availability: | With Fulltext |
Appears in Collections: | EEE Theses |
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File | Description | Size | Format | |
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PhD thesis_Jiang Jize.pdf | 2.66 MB | Adobe PDF | ![]() View/Open |
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