Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/107454
Title: SRAM devices and circuits optimization toward energy efficiency in multi-Vth CMOS
Authors: Wang, Bo
Zhou, Jun
Kim, Tony Tae-Hyoung
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Microelectronics
Issue Date: 2015
Source: Wang, B., Zhou, J., & Kim, T. T.-H. (2014). SRAM devices and circuits optimization toward energy efficiency in multi-Vth CMOS. Microelectronics Journal, 46(3), 265-272.
Series/Report no.: Microelectronics Journal
Abstract: Minimum-energy-driven circuit design is highly required in numerous emerging applications such as mobile electronics, wireless sensor nodes, implantable biomedical devices, etc. Due to high computing capability requirements in such applications, SRAMs play a critical role in energy consumption. This paper presents SRAM energy analysis utilizing multi-threshold (multi-Vth) voltage devices and various circuit techniques for power reduction and performance improvement, and suggests optimal device combinations for energy efficiency improvement. In general, higher-Vth devices are preferred in the cross-coupled latches and the write access transistors for reducing leakage current while lower-Vth devices are desired in the read port for implementing higher performance. However, excessively raised Vth in the write paths, i.e. the cross-coupled latches and the write access transistors, leads to slower write speed than read, quickly nullifying improved energy efficiency. In this work, the energy efficiency improvement of 6.24× is achieved only through an optimal device combination in a commercial 65 nm CMOS technology. Employing power reduction and performance boosting techniques together with the optimal device combination enhances the energy efficiency further up to 33×.
URI: https://hdl.handle.net/10356/107454
http://hdl.handle.net/10220/25506
ISSN: 0026-2692
DOI: 10.1016/j.mejo.2014.12.003
Rights: © 2014 Elsevier. This is the author created version of a work that has been peer reviewed and accepted for publication by Microelectronics Journal, Elsevier. It incorporates referee’s comments but changes resulting from the publishing process, such as copyediting, structural formatting, may not be reflected in this document. The published version is available at: [http://dx.doi.org/10.1016/j.mejo.2014.12.003].
Fulltext Permission: open
Fulltext Availability: With Fulltext
Appears in Collections:EEE Journal Articles

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