Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/13152
Title: Design of low power CMOS adiabatic logic circuits
Authors: Liu, Fang.
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Semiconductors
Issue Date: 1999
Abstract: Energy recovery or adiabatic computing is a relatively new approach in low power IC design. The characteristics of energy recovery logic is that it utilizes an alternating voltage source instead of a conventional DC source to charge and discharge logic state-holding capacitances through small voltage drops. The small voltage drops in the switching devices result in minimal power dissipation during transitions and the alternating voltage source allows the energy stored on the capacitors to be returned to the supply. This thesis presents the design and simulation of five novel energy recovery logic families and some application circuits such as adiabatic PLA and multiplier circuits. Some experimental results are also presented.
URI: http://hdl.handle.net/10356/13152
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Theses

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