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|Title:||Hybrid carbon nanotube/metal wall for advance EM shielding||Authors:||Seh, Wei Bin||Keywords:||Engineering::Electrical and electronic engineering::Microelectronics||Issue Date:||2020||Publisher:||Nanyang Technological University||Project:||B2200-191||Abstract:||Moore’s law states that the number of transistors in a densely packed integrated circuit will double about every two years. With the miniaturization of electronics, the chances of electromagnetic interference (EMI) will increase significantly. Thus, electromagnetic shielding is essential in filtering both incoming and outgoing interference and ensure that the product fulfils several regulatory requirements and standards. Currently, most electromagnetic shields are made of metallic materials such as copper and aluminium due to their attributes such as workability and high electrical conductivity. However, as the trend of downscaling electronic devices continue, the metallic materials present problems hindering the downscaling of ICs; their relatively heavy weight, and inability to form complex, deep sub-millimetre high aspect ratio structures are some of the major limitations in the continued down scaling of electronic circuit boards. The use of Carbon Nanotubes (CNTs) is a possible solution for replacing these metallic materials as EMI shields. However, the current method of using CNTs as EM shields involves the use of adhesive binding materials which are unable to take advantage of the attributes of CNTs and have the same inherent problem of being unable to form complex high aspect ratio structures. Furthermore, the solution of direct growth CNTs on microelectronic devices is hindered due to the high synthesis temperature of CNT growth, making it incompatible with the temperature sensitive nature of microelectronic device fabrication. This project aims to develop a reliable and scalable method to deposit a uniform layer of epoxy onto vertically aligned CNT to form a hybrid structure. The requirements and the morphologies of the hybrid structure formed will be discussed and investigated. The second phase of the project will aim to develop a maskless and scalable technique to perform post growth CNT transfer at low temperatures of microelectronics assembly.||URI:||https://hdl.handle.net/10356/138747||Fulltext Permission:||restricted||Fulltext Availability:||With Fulltext|
|Appears in Collections:||EEE Student Reports (FYP/IA/PA/PI)|
Updated on Jun 24, 2022
Updated on Jun 24, 2022
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