Studies of interface traps in GaN High-Electron-Mobility-Transistors (HEMTs)

Abstract

This research presents the characterization of interface traps of GaN High-ElectronMobility Transistors (HEMT). GaN HEMT devices have shown excellent performance in many area of applications such as high power, high frequency, communication and space application. Though it is attractive for future applications, the performance and reliability of GaN HEMT devices are still restricted by trapping effects. The trapping effects are categorized based on their location in the device structure. In this report, the interface trap states were investigated using the conductance method and the GaN HEMT device used in the experimental setup is grown using MOCVD and it is under silicon substrate. Specifically, the study of interface traps is done through analysis of interface trap density (Dit), trap energy level (ET) and trap time constant (𝜏it) from the experiment. From the conductance method, this report have evaluated Dit range of (4.813 ~ 7.735) x 1012 cm-2 eV-1, ET range of (0.3170 ~ 0.3455) eV and 𝜏it range of (1.061 ~ 3.183) µs. Additionally, DC electrical behavior (I-V) were performed for the same device to analyze the effect of interface traps. Lastly, recommendation for future research of interface traps were suggested to prompt future researchers in a good direction.