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Title: Fast MPEG-CDVS encoder with GPU-CPU hybrid computing
Authors: Duan, Ling-Yu
Sun, Wei
Zhang, Xinfeng
Wang, Shiqi
Chen, Jie
Yin, Jianxiong
See, Simon
Huang, Tiejun
Kot, Alex Chichung
Gao, Wen
Keywords: Engineering::Computer science and engineering
Issue Date: 2018
Source: Duan, L.-Y., Sun, W., Zhang, X., Wang, S., Chen, J., Yin, J., . . . Gao, W. (2018). Fast MPEG-CDVS encoder with GPU-CPU hybrid computing. IEEE Transactions on Image Processing, 27(5), 2201-2216. doi:10.1109/TIP.2018.2794203
Journal: IEEE Transactions on Image Processing
Abstract: The compact descriptors for visual search (CDVS) standard from ISO/IEC moving pictures experts group has succeeded in enabling the interoperability for efficient and effective image retrieval by standardizing the bitstream syntax of compact feature descriptors. However, the intensive computation of a CDVS encoder unfortunately hinders its widely deployment in industry for large-scale visual search. In this paper, we revisit the merits of low complexity design of CDVS core techniques and present a very fast CDVS encoder by leveraging the massive parallel execution resources of graphics processing unit (GPU). We elegantly shift the computation-intensive and parallel-friendly modules to the state-of-the-arts GPU platforms, in which the thread block allocation as well as the memory access mechanism are jointly optimized to eliminate performance loss. In addition, those operations with heavy data dependence are allocated to CPU for resolving the extra but non-necessary computation burden for GPU. Furthermore, we have demonstrated the proposed fast CDVS encoder can work well with those convolution neural network approaches which enables to leverage the advantages of GPU platforms harmoniously, and yield significant performance improvements. Comprehensive experimental results over benchmarks are evaluated, which has shown that the fast CDVS encoder using GPU-CPU hybrid computing is promising for scalable visual search.
ISSN: 1057-7149
DOI: 10.1109/TIP.2018.2794203
Rights: © 2018 IEEE. All rights reserved.
Fulltext Permission: none
Fulltext Availability: No Fulltext
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