Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/14231
Title: Development of nanocrystal memory devices
Authors: Chen, Tupei.
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Nanoelectronics
Issue Date: 2007
Abstract: In this project, we have fabricated non-volatile memory (NVM) devices based on silicon nanocrystals. The nanocrystals are synthesized with very-low energy ion beam technique, and the size of the nanocrystals is ~ 4 nm as determined from TEM measurement. The fabrication of the memory devices is fully compatible with the conventional CMOS process. The memory characteristics, reliability, and the effects of tunnel oxide thickness and programming mechanisms have been investigated. Channel-hot-electron programming is found to yield a better memory performance and reliability. Promising device results have been presented, demonstrating low-voltage operation for comparable memory windows, and good thin tunnel oxide retention performance that suggests to meet long-term nonvolatility requirements. An important issue for nanocrystal memory found in this work is the charge trapping in the control oxide during the programming operation. The charge trapping leads to an increase in the threshold voltage for both the programmed and erased states during repeated programming/erasing operations. This problem could be overcome by development of high quality oxides and/or device design solutions.
URI: http://hdl.handle.net/10356/14231
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Research Reports (Staff & Graduate Students)

Files in This Item:
File Description SizeFormat 
RG99-05 Chen Tupei EEE.pdf
  Restricted Access
1.46 MBAdobe PDFView/Open

Page view(s)

223
checked on Sep 26, 2020

Download(s)

8
checked on Sep 26, 2020

Google ScholarTM

Check

Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.