dc.contributor.authorChen, Zhiming
dc.date.accessioned2008-12-16T09:19:07Z
dc.date.accessioned2017-07-23T08:32:19Z
dc.date.available2008-12-16T09:19:07Z
dc.date.available2017-07-23T08:32:19Z
dc.date.copyright2008en_US
dc.date.issued2008
dc.identifier.citationChen, Z. (2008). A study of wireless inter-chip interconnect. Doctoral thesis, Nanyang Technological University, Singapore.
dc.identifier.urihttp://hdl.handle.net/10356/14559
dc.description.abstractIn semiconductor industry, device feature dimension has been continuously scaled down to reduce device size and to improve circuit performance. In parallel with the device feature dimension down scaling, the width and thickness of wire interconnect have been reduced. On the other hand, to integrate more functions together, chip size continues growing. Therefore, the down-scaled wire interconnect has to route over an ever increasing chip area, implying degraded interconnect performance. As a matter of fact, performance of interconnects rather than device has become a bottleneck of ICs system performance. With improved radio frequency silicon technologies and higher-degree integration, wireless interconnect, which realizes wireless communications among cores within a chip or different chips within a module, is a viable candidate for solving problems in future generations of interconnects.en_US
dc.format.extent179 p.en_US
dc.language.isoenen_US
dc.subjectDRNTU::Engineering::Electrical and electronic engineering::Antennas, wave guides, microwaves, radar, radioen_US
dc.subjectDRNTU::Engineering::Electrical and electronic engineering::Electronic circuitsen_US
dc.titleA study of wireless inter-chip interconnecten_US
dc.typeThesisen_US
dc.contributor.schoolSchool of Electrical and Electronic Engineeringen_US
dc.contributor.supervisorZhang Yue Pingen_US
dc.description.degreeDOCTOR OF PHILOSOPHY (EEE)en_US


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