Please use this identifier to cite or link to this item:
https://hdl.handle.net/10356/145794
Title: | HFNet : a CNN architecture co-designed for neuromorphic hardware with a crossbar array of synapses | Authors: | Gopalakrishnan, Roshan Chua, Yansong Sun, Pengfei Kumar, Ashish Jith Sreejith Basu, Arindam |
Keywords: | Engineering::Electrical and electronic engineering | Issue Date: | 2020 | Source: | Gopalakrishnan, R., Chua, Y., Sun, P., Kumar, A. J. S., & Basu, A. (2020). HFNet : a CNN architecture co-designed for neuromorphic hardware with a crossbar array of synapses. Frontiers in Neuroscience, 14, 907-. doi:10.3389/fnins.2020.00907 | Journal: | Frontiers in Neuroscience | Abstract: | The hardware-software co-optimization of neural network architectures is a field of research that emerged with the advent of commercial neuromorphic chips, such as the IBM TrueNorth and Intel Loihi. Development of simulation and automated mapping software tools in tandem with the design of neuromorphic hardware, whilst taking into consideration the hardware constraints, will play an increasingly significant role in deployment of system-level applications. This paper illustrates the importance and benefits of co-design of convolutional neural networks (CNN) that are to be mapped onto neuromorphic hardware with a crossbar array of synapses. Toward this end, we first study which convolution techniques are more hardware friendly and propose different mapping techniques for different convolutions. We show that, for a seven-layered CNN, our proposed mapping technique can reduce the number of cores used by 4.9–13.8 times for crossbar sizes ranging from 128 × 256 to 1,024 × 1,024, and this can be compared to the toeplitz method of mapping. We next develop an iterative co-design process for the systematic design of more hardware-friendly CNNs whilst considering hardware constraints, such as core sizes. A python wrapper, developed for the mapping process, is also useful for validating hardware design and studies on traffic volume and energy consumption. Finally, a new neural network dubbed HFNet is proposed using the above co-design process; it achieves a classification accuracy of 71.3% on the IMAGENET dataset (comparable to the VGG-16) but uses 11 times less cores for neuromorphic hardware with core size of 1,024 × 1,024. We also modified the HFNet to fit onto different core sizes and report on the corresponding classification accuracies. Various aspects of the paper are patent pending. | URI: | https://hdl.handle.net/10356/145794 | ISSN: | 1662-4548 | DOI: | 10.3389/fnins.2020.00907 | Schools: | School of Electrical and Electronic Engineering | Organisations: | Institute for Infocomm Research, A*STAR | Rights: | © 2020 Gopalakrishnan, Chua, Sun, Sreejith Kumar and Basu. This is an open-access article distributed under the terms of the Creative Commons Attribution License (CC BY). The use, distribution or reproduction in other forums is permitted, provided the original author(s) and the copyright owner(s) are credited and that the original publication in this journal is cited, in accordance with accepted academic practice. No use, distribution or reproduction is permitted which does not comply with these terms. | Fulltext Permission: | open | Fulltext Availability: | With Fulltext |
Appears in Collections: | EEE Journal Articles |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
fnins-14-00907.pdf | 3.18 MB | Adobe PDF | View/Open |
SCOPUSTM
Citations
20
13
Updated on Mar 27, 2024
Web of ScienceTM
Citations
20
9
Updated on Oct 28, 2023
Page view(s)
263
Updated on Mar 27, 2024
Download(s) 50
149
Updated on Mar 27, 2024
Google ScholarTM
Check
Altmetric
Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.