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dc.contributor.authorSeok, Moon Gien_US
dc.contributor.authorSarjoughian, Hessam S.en_US
dc.contributor.authorChoi, Changbeomen_US
dc.contributor.authorPark, Daejinen_US
dc.identifier.citationSeok, M. G., Sarjoughian, H. S., Choi, C., & Park, D. (2020). Fast and cycle-accurate simulation of RTL NoC designs using test-driven cellular automata. IEEE Access, 8, 2670-2686. doi:10.1109/ACCESS.2019.2962253en_US
dc.description.abstractSpeeding up the register-transfer level (RTL) simulation of network-on-chip (NoC) is essential for design optimization under various use scenarios and parameters. One of the promising approaches for RTL NoC speedup is high-level modeling. Conventional high-level modeling approaches lead to an accuracy problem or modeling efforts that are caused by the absence of modeling framework or requiring in-depth knowledge of specific behaviors of target NoCs. To support cycle-accurate and formal high-level modeling framework, we propose a cellular automata (CA) modeling framework for RTL NoC. The CA abstracts detailed RTL NoC dynamics into the proposed high-level state transitions, which support flit transmission among CA components through dynamically changing flit paths based on the target RTL routing and arbitration algorithms. To prevent the meaningless execution of stable CA, the CA are designed to be triggered by state-change events. The proposed simulation engine asynchronously invokes CA to update their states and perform actions of flit transmissions or flit-path changes based on the state-decision result. To reduce the modeling difficulty, we provide a test environment that generates the state-transition rules for CA after monitoring the relationships between high-level states and leading actions under randomly injected packets during target RTL NoC simulations. Experiments demonstrate cycle-level functional homogeneity between RTL and the abstracted CA NoC models and significant simulation speedup.en_US
dc.relation.ispartofIEEE Accessen_US
dc.rights© 2020 IEEE. This journal is 100% open access, which means that all content is freely available without charge to users or their institutions. All articles accepted after 12 June 2019 are published under a CC BY 4.0 license, and the author retains copyright. Users are allowed to read, download, copy, distribute, print, search, or link to the full texts of the articles, or use them for any other lawful purpose, as long as proper attribution is given.en_US
dc.subjectEngineering::Computer science and engineeringen_US
dc.titleFast and cycle-accurate simulation of RTL NoC designs using test-driven cellular automataen_US
dc.typeJournal Articleen
dc.contributor.schoolSchool of Computer Science and Engineeringen_US
dc.description.versionPublished versionen_US
dc.subject.keywordsNetwork On Chipen_US
dc.subject.keywordsCellular Automataen_US
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