Please use this identifier to cite or link to this item:
https://hdl.handle.net/10356/147019
Title: | An overview of hardware security and trust : threats, countermeasures and design tools | Authors: | Hu, Wei Chang, Chip-Hong Sengupta, Anirban Bhunia, Swarup Kastner, Ryan Li, Hai |
Keywords: | Engineering::Electrical and electronic engineering::Integrated circuits Engineering::Electrical and electronic engineering::Computer hardware, software and systems |
Issue Date: | 2020 | Source: | Hu, W., Chang, C., Sengupta, A., Bhunia, S., Kastner, R. & Li, H. (2020). An overview of hardware security and trust : threats, countermeasures and design tools. IEEE Transactions On Computer-Aided Design of Integrated Circuits and Systems. https://dx.doi.org/10.1109/TCAD.2020.3047976 | Project: | CHFA-GC1-AW01, 62074131 | Journal: | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | Abstract: | Hardware security and trust have become a pressing issue during the last two decades due to the globalization of the semi-conductor supply chain and ubiquitous network connection of computing devices. Computing hardware is now an attractive attack surface for launching powerful cross-layer security attacks, allowing attackers to infer secret information, hijack control flow, compromise system root-of-trust, steal intellectual property (IP) and fool machine learners. On the other hand, security practitioners have been making tremendous efforts in developing protection techniques and design tools to detect hardware vulnerabilities and fortify hardware design against various known hardware attacks. This paper presents an overview of hardware security and trust from the perspectives of threats, countermeasures and design tools. By introducing the most recent advances in hardware security research and developments, we aim to motivate hardware designers and electronic design automation tool developers to consider the new challenges and opportunities of incorporating an additional dimension of security into robust hardware design, testing and verification. | URI: | https://hdl.handle.net/10356/147019 | ISSN: | 1937-4151 | DOI: | 10.1109/TCAD.2020.3047976 | Rights: | © 2020 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: https://doi.org/10.1109/TCAD.2020.3047976 | Fulltext Permission: | open | Fulltext Availability: | With Fulltext |
Appears in Collections: | EEE Journal Articles |
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TCAD_Hardware_Security_Survey.pdf | 5.69 MB | Adobe PDF | ![]() View/Open |
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