Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/14740
Title: Low power and high performance arithmetic circuit
Authors: Hua, Ziyun.
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Issue Date: 2009
Abstract: This report presents several classes of XOR and Multiplexor based adders, 4-2 and 5-2 compressors are surveyed based on their delay, power and number of transistors for single unit block. The adders studied including the ripple carry adder, Carry select adder (CSA), Self Energy Recovery Full Adder and G-/P- XNOR based Full Adder. For the compressors, 7 XOR and 5 MUX modules forms nine 4-2 compressors and nine 5-2 compressors respectively. The delay, power will be tested under the worst case delay conditions. And the supply power ranged from 0.6 V to 3.3 V is examined to see the relationship to the performance. In the end, the transistors of each design will be countered.
URI: http://hdl.handle.net/10356/14740
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Student Reports (FYP/IA/PA/PI)

Files in This Item:
File Description SizeFormat 
EEEA2184S.pdf
  Restricted Access
2.26 MBAdobe PDFView/Open

Google ScholarTM

Check

Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.