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dc.contributor.authorHerath, Kalinduen_US
dc.contributor.authorPrakash, Aloken_US
dc.contributor.authorFahmy, Suhaib A.en_US
dc.contributor.authorSrikanthan, Thambipillaien_US
dc.identifier.citationHerath, K., Prakash, A., Fahmy, S. A. & Srikanthan, T. (2020). Power-efficient mapping of large applications on modern heterogeneous FPGAs. IEEE Transactions On Computer-Aided Design of Integrated Circuits and Systems, 40(12), 2508-2521.
dc.description.abstractThe increasing size of modern FPGAs allows for ever more complex applications to be mapped onto them. However, long design implementation times for large designs can severely affect design productivity. A modular design methodology can improve design productivity in a divide and conqueror fashion but at the expense of degraded performance and power consumption of the resulting implementation. To reduce the dominant power dissipation component in FPGAs, the routing power, methodologies have been proposed that consider data communication between modules during module formation and placement on the FPGA. Selecting proper mapping region on target FPGAs, on the other hand, is becoming a critical process because of the heterogeneous resources and column arrangements in modern FPGAs. Selecting inappropriate FPGA regions for mapping could lead to degraded performance. Hence, we propose a methodology that uses communication-aware module placement, such that modules are mapped by selecting the best shape and region on the FPGA factoring the columnar resource arrangements. Additionally, techniques for module locking and splitting have been proposed for deterministic convergence of the algorithm and for improved module placement. This methodology exhibits nearly 19% routing power reduction with respect to commercial CAD flows without any degradation in achievable performance.en_US
dc.relation.ispartofIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systemsen_US
dc.rights© 2020 IEEE. All rights reserved.en_US
dc.subjectEngineering::Computer science and engineeringen_US
dc.titlePower-efficient mapping of large applications on modern heterogeneous FPGAsen_US
dc.typeJournal Articleen
dc.contributor.schoolSchool of Computer Science and Engineeringen_US
dc.description.versionAccepted versionen_US
dc.subject.keywordsField Programmable Gate Arraysen_US
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