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Title: TSV-integrated surface electrode ion trap for scalable quantum information processing
Authors: Zhao, Peng
Likforman, J. P.
Li, Hong Yu
Tao, Jing
Henner, T.
Lim, Yu Dian
Seit, W. W.
Tan, Chuan Seng
Guidoni, Luca
Keywords: Engineering::Electrical and electronic engineering::Semiconductors
Issue Date: 2021
Source: Zhao, P., Likforman, J. P., Li, H. Y., Tao, J., Henner, T., Lim, Y. D., Seit, W. W., Tan, C. S. & Guidoni, L. (2021). TSV-integrated surface electrode ion trap for scalable quantum information processing. Applied Physics Letters, 118(12), 124003-.
Project: A1685b0005
Journal: Applied Physics Letters
Abstract: In this study, we report the first Cu-filled through silicon via (TSV) integrated ion trap. TSVs are placed directly underneath electrodes as vertical interconnections between ion trap and a glass interposer, facilitating the arbitrary geometry design with increasing electrodes numbers and evolving complexity. The integration of TSVs reduces the form factor of ion trap by more than 80%, minimizing parasitic capacitance from 32 to 3 pF. A low RF dissipation is achieved in spite of the absence of ground screening layer. The entire fabrication process is on 12-inch wafer and compatible with established CMOS back end process. We demonstrate the basic functionality of the trap by loading and laser-cooling single 88Sr+ ions. It is found that both heating rate (17 quanta/ms for an axial frequency of 300 kHz) and lifetime (~30 minutes) are comparable with traps of similar dimensions. This work pioneers the development of TSV-integrated ion traps, enriching the toolbox for scalable quantum computing.
ISSN: 0003-6951
DOI: 10.1063/5.0042531
Schools: School of Electrical and Electronic Engineering 
Rights: © 2021 The Author(s) (Published by AIP). All rights reserved. This paper was published in Applied Physics Letters and is made available with permission of The Author(s) (Published by AIP).
Fulltext Permission: open
Fulltext Availability: With Fulltext
Appears in Collections:EEE Journal Articles

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