Please use this identifier to cite or link to this item:
https://hdl.handle.net/10356/148686
Title: | Cross-VM micro-architectural covert channel attacks in L1 cache | Authors: | Ng, Joel Wei Jie | Keywords: | Engineering::Computer science and engineering | Issue Date: | 2021 | Publisher: | Nanyang Technological University | Source: | Ng, J. W. J. (2021). Cross-VM micro-architectural covert channel attacks in L1 cache. Final Year Project (FYP), Nanyang Technological University, Singapore. https://hdl.handle.net/10356/148686 | Abstract: | In virtualized platforms, virtual machines are logically isolated by privileged hypervisors. These hypervisors provide abstraction and prevent virtual machines or processes from communicating with one another. Although the prevention of direct communication is enforced by these privileged hypervisors, these virtual machines or processes utilize the same hardware components like CPU core, CPU cache, bus, DRAM, etc. This sharing of hardware components opens up the possibility of two processes exchanging messages through what we call covert channels. In this paper, I would like to determine if the bandwidth L1 cache covert channels are useful in data exfiltration or are of any use to begin with, and compare it with L2 cache covert channels [1] | URI: | https://hdl.handle.net/10356/148686 | Schools: | School of Computer Science and Engineering | Fulltext Permission: | restricted | Fulltext Availability: | With Fulltext |
Appears in Collections: | SCSE Student Reports (FYP/IA/PA/PI) |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
NgWeiJieJoel_FYP Titled.pdf Restricted Access | 362.72 kB | Adobe PDF | View/Open |
Page view(s)
179
Updated on Mar 27, 2024
Download(s)
2
Updated on Mar 27, 2024
Google ScholarTM
Check
Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.