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https://hdl.handle.net/10356/149912
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DC Field | Value | Language |
---|---|---|
dc.contributor.author | Zhuang, Zhentao | en_US |
dc.date.accessioned | 2021-06-09T03:08:25Z | - |
dc.date.available | 2021-06-09T03:08:25Z | - |
dc.date.issued | 2021 | - |
dc.identifier.citation | Zhuang, Z. (2021). Universal multilevel power converter. Final Year Project (FYP), Nanyang Technological University, Singapore. https://hdl.handle.net/10356/149912 | en_US |
dc.identifier.uri | https://hdl.handle.net/10356/149912 | - |
dc.description.abstract | In this report, we will introduce a new multilevel converter topology with reduced switches and multiple outputs, such as DC to AC and DC to DC. IGBT and MOSFET are commonly applying in building Modular Multilevel Converter(MMC), which effectively reduce power loss and the size of the converter. The combination of every MOSFET or IGBT will introduce the high-frequency switching range, and it will improve the efficiency of the converter. There are various topologies used in Multilevel converter such as CHB converter, Full Bridge converter, Flying capacitor converter, Neutral Point Clamped converter. Among the traditional topologies, the Level detection PWM modulation technique is aims to drive the converter's output and balance the converter's voltage level by controlling the state of the switches. The simulation results show an effective control algorithm and normal operation of the converter. This report presents two predictive model control for DC to AC and DC to DC configuration. | en_US |
dc.language.iso | en | en_US |
dc.publisher | Nanyang Technological University | en_US |
dc.relation | P1051-192 | en_US |
dc.subject | Engineering::Electrical and electronic engineering | en_US |
dc.title | Universal multilevel power converter | en_US |
dc.type | Final Year Project (FYP) | en_US |
dc.contributor.supervisor | Amer M. Y. M. Ghias | en_US |
dc.contributor.school | School of Electrical and Electronic Engineering | en_US |
dc.description.degree | Bachelor of Engineering (Electrical and Electronic Engineering) | en_US |
dc.contributor.supervisoremail | amer.ghias@ntu.edu.sg | en_US |
item.grantfulltext | restricted | - |
item.fulltext | With Fulltext | - |
Appears in Collections: | EEE Student Reports (FYP/IA/PA/PI) |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
FYPReport_ZHUANG ZHENTAO_FinalV.pdf Restricted Access | 6.41 MB | Adobe PDF | View/Open |
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