Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/150027
Title: Asynchronous library cell development for hardware security
Authors: Yan, Meng
Keywords: Engineering::Electrical and electronic engineering
Issue Date: 2021
Publisher: Nanyang Technological University
Source: Yan, M. (2021). Asynchronous library cell development for hardware security. Final Year Project (FYP), Nanyang Technological University, Singapore. https://hdl.handle.net/10356/150027
Project: A2078-201
Abstract: In modern day society, encryption is a required defense in countering against adversaries. Implementations of encryption ensures data security in data transmissions and storage from being extracted and exploited. With a secret key, the specific person with the specific key is only allowed to access their specific information or data. However, there are ways to exploit the system and extract information on the key, leading to a potential breach in security. A cipher, like Advanced Encryption Standard (AES), is commonly used encryption algorithm to protect against attackers, however, it is vulnerable to physical attacks. Attackers can get information of the secret key through various physical attacks also known as Side Channel Attacks (SCA). There are multiple ways to conduct a SCA, through analyzation of the power, timing, electromagnetism, and even the optical and acoustic of the output, SCA is the main threat for the hardware security nowadays. In this project, Asynchronous Cells (ASC) are designed to counter the attacks by using signal manipulation. This is mainly to counter Differential Power Analysis (DPA) and Side Channel Timing Attack (TA). This report will go through the step-by-step process from designing to layout of the cells.
URI: https://hdl.handle.net/10356/150027
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Student Reports (FYP/IA/PA/PI)

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