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Title: Investigation of interface properties of h-BN and AlN on AlGaN/GaN heterostructures
Authors: Whiteside, Matthew David
Keywords: Engineering::Electrical and electronic engineering::Semiconductors
Engineering::Electrical and electronic engineering::Microelectronics
Issue Date: 2020
Publisher: Nanyang Technological University
Source: Whiteside, M. D. (2020). Investigation of interface properties of h-BN and AlN on AlGaN/GaN heterostructures. Doctoral thesis, Nanyang Technological University, Singapore.
Abstract: AlGaN/GaN based high electron mobility transistors (HEMTs) are excellent for high-frequency and high-power applications such as DC-DC convertors, cellular base stations, radar and wireless communication systems. This is due to its excellent intrinsic material properties such as a wide band gap, high critical electric field, and high electron saturation velocity in the two-dimensional electron gas (2DEG) channel. However, in spite of these advantages, there remain issues to be solved. Two such issues are current collapse and the self-heating effect. Current collapse is due to the trapping of electrons during device operation. These traps are typically found on the surface of the HEMT structure and/or distributed within AlGaN barrier and/or GaN buffer region. While the traps within the AlGaN barrier and GaN buffer regions are formed during the growth of the device structure, the traps at the HEMT surface can be reduced using various passivation schemes. Si3N4 is the most widely used passivation layer for suppressing the current collapse. However, its poor thermal conductivity (10 WK-1m-1) prevents suppression of self-heating of the device. Ideally, a passivation layer used on GaN HEMT will suppress both the current collapse and reduce the self-heating inherent in these devices. Therefore, materials with high thermal conductivity such as hexagonal boron nitride (h-BN) (~400 Wm-1K-1) and AlN (~285 WK-1m-1) would be more useful for heat extraction compared to Si3N4. However, the typical deposition methods for both these materials either require high temperature such as metal organic chemical vapor deposition (MOCVD) or deposit at very slow rates such as plasma enhanced atomic layer deposition (PEALD). Therefore, alternative methods of depositing these materials, and the investigation of the effects of the deposition method on the interface and thermal properties is required. In this thesis, the main objectives are to analyze the interface properties of h-BN and AlN on GaN. This involved the analysis of novel deposition methods of h-BN and AlN on GaN HEMT. An investigation of interface traps was performed for each material. The major contributions of this thesis are summarized below: 1) Vertically ordered h-BN films were successfully sputtered on AlGaN/GaN heterostructure (HS) using High Power Impulse Magnetron Sputtering (HiPIMS) at room temperature. The deposition process was optimized to produce h-BN with vertical ordering along the (0002) plane, which was confirmed using high-resolution transmission electron microscopy. After the h-BN deposition, degradation of 2DEG properties was observed in AlGaN/GaN HS. Full recovery of 2DEG mobility, along with an improvement in sheet resistance and an increase in sheet carrier concentration was obtained after rapid thermal annealing at 500 °C for 300s in a N2 atmosphere, which is found to be due to the reduction of sputtering related structural damage. 2) AlGaN/GaN metal-insulator-semiconductor (MIS) diodes using HiPIMS deposited vertically ordered h-BN at room temperature as a dielectric have been demonstrated for the first time. The MIS-diodes exhibited 2 orders of magnitude lower gate leakage current compared to conventional Schottky diodes. The interface state density (Dit) was extracted using the frequency dependent parallel conductance method, with an estimated minimum value of 8.5×1011 cm-2eV-1 at 0.25 eV below the conduction band. However, despite the relatively low Dit, the nano-crystalline structure of the deposited h-BN film showed poor current collapse prevention due to remaining structural damage caused during the HiPIMS deposition. 3) AlGaN/GaN MIS-diodes were fabricated using low temperature epitaxy (LTE) grown single-crystalline AlN at 200 °C, a technique combining both physical vapor deposition and chemical vapor deposition. This was the first time LTE grown AlN film was successfully used as the passivation layer for GaN MIS-diodes. The Dit characteristics of the MIS-diodes were investigated using the frequency dependent parallel conductance method. Initial results showed a minimum Dit value of 2.6×1012 cm-2eV-1. 4) The deposition method of AlN by LTE was further optimized to reduce surface damage during the deposition. This process optimization led to ~ 3.8 times improvement in Dit compared to the previous values prior to process optimization. Two distinct interface trapping regions were observed namely fast and slow traps. The fast interface traps had Dit as low as 6.7×1011 cm-2eV-1 while the slow interface traps Dit were as low as 6.8×1011 cm-2eV-1. The fast traps are located within the energy interval of 0.24 to 0.30 eV below the conduction band while the slow traps are located 0.44 to 0.56 eV below the conduction band. The observed fast traps were associated with the AlGaN/GaN interface, while the observed slow traps may have formed at AlN/GaN interface during the deposition of AlN by LTE. The reported low Dit values were in between values reported by in-situ MOCVD AlN and PEALD AlN. Post gate annealing effects of AlGaN/GaN MISHEMT were also examined. The 400 °C annealed MISHEMT exhibited an increase of 15% in maximum extrinsic transconductance (gmmax) and an order of magnitude reduction in reverse gate leakage, while maintaining high suppression (93-95%) of current collapse. The reduction of gate leakage current is attributed to the reduction of fast (13%) and slow (25%) interface states after post gate annealing at 400 °C. This study demonstrates that LTE grown AlN can be used as an alternative method to achieve reasonably low Dit values at low temperature which is compatible to mainstream wafer processing.
DOI: 10.32657/10356/150543
Rights: This work is licensed under a Creative Commons Attribution-NonCommercial 4.0 International License (CC BY-NC 4.0).
Fulltext Permission: open
Fulltext Availability: With Fulltext
Appears in Collections:EEE Theses

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