Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/150807
Title: A hierarchical multiclassifier system for automated analysis of delayered IC images
Authors: Cheng, Deruo
Shi, Yiqiong
Gwee, Bah-Hwee
Toh, Kar-Ann
Lin, Tong
Keywords: Engineering::Electrical and electronic engineering
Issue Date: 2019
Source: Cheng, D., Shi, Y., Gwee, B., Toh, K. & Lin, T. (2019). A hierarchical multiclassifier system for automated analysis of delayered IC images. IEEE Intelligent Systems, 34(2), 36-43. https://dx.doi.org/10.1109/MIS.2018.2886669
Journal: IEEE Intelligent Systems
Abstract: A robust and accurate machine learning based hierarchical multiclassifier system is proposed to automate the retrieval of interconnection information from delayered integrated circuits images. The proposed system replaces labor-intensive manual annotation process and provides an effective approach for the automated analysis of state-of-the-art deep submicron IC chips.
URI: https://hdl.handle.net/10356/150807
ISSN: 1541-1672
DOI: 10.1109/MIS.2018.2886669
Rights: © 2018 IEEE. All rights reserved.
Fulltext Permission: none
Fulltext Availability: No Fulltext
Appears in Collections:EEE Journal Articles

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