Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/151178
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dc.contributor.authorZhu, Yeen_US
dc.contributor.authorTan, Chong Weien_US
dc.contributor.authorChua, Shen Linen_US
dc.contributor.authorLim, Yu Dianen_US
dc.contributor.authorTay, Beng Kangen_US
dc.contributor.authorTan, Chuan Sengen_US
dc.date.accessioned2021-06-07T05:33:23Z-
dc.date.available2021-06-07T05:33:23Z-
dc.date.issued2018-
dc.identifier.citationZhu, Y., Tan, C. W., Chua, S. L., Lim, Y. D., Tay, B. K. & Tan, C. S. (2018). Growth and fabrication of carbon-based three-dimensional heterostructure in through-silicon vias (TSVs) for 3D interconnects. 2017 19th Electronics Packaging Technology Conference (EPTC), 1-5. https://dx.doi.org/10.1109/EPTC.2017.8277558en_US
dc.identifier.isbn9781538630426-
dc.identifier.urihttps://hdl.handle.net/10356/151178-
dc.description.abstractCarbon nanomaterials such as graphene and carbon nanotubes (CNTs) have recently received much attention as potential materials proposed for integration in the future semiconductor technologies because of the advantageous properties particularly in thermal and electrical conductivities. Among them, three-dimensional (3D) pillared CNT-graphene nanostructures are especially attractive due to the desirable out-of-plane and in-plane properties. In this work, a growth and fabrication process flow of CNT-graphene heterostructure as filler of TSV for 3D interconnects was designed and explored. First, experiments for the fabrication of top wafer with unfilled TSV of various diameters (5-50μm) and bottom wafer with patterned graphene electrodes and catalyst deposition were completed successfully. Next, top TSV wafer and bottom graphene wafer were bonded and manually ground followed by wet and dry etching to completely remove the handling wafer and buried oxide, exposing the underlying TSV. CNT growth was conducted for both within TSV and free standing on the graphene. Compared to the free-standing growth with sufficient length (~334μm) and high density (~10 11 cm -2 estimated), few via holes have CNTs grown and none was completely filled by CNTs. The inhibited growth of CNTs within unfilled TSV can possibly be attributed to several process-engineering steps involved in wafer-bonding, grinding and wet/dry etching. Further modification and optimization of the process steps need to be done in order to attain higher CNT fillings within the unfilled TSV.en_US
dc.description.sponsorshipMinistry of Education (MOE)en_US
dc.language.isoenen_US
dc.relationMOE2014- T2-2-105 (ARC22/15)en_US
dc.rights© 2017 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: https://doi.org/10.1109/EPTC.2017.8277558.en_US
dc.subjectEngineering::Electrical and electronic engineeringen_US
dc.titleGrowth and fabrication of carbon-based three-dimensional heterostructure in through-silicon vias (TSVs) for 3D interconnectsen_US
dc.typeConference Paperen
dc.contributor.schoolSchool of Electrical and Electronic Engineeringen_US
dc.contributor.conference2017 19th Electronics Packaging Technology Conference (EPTC)en_US
dc.identifier.doi10.1109/EPTC.2017.8277558-
dc.description.versionAccepted versionen_US
dc.identifier.scopus2-s2.0-85050663737-
dc.identifier.spage1en_US
dc.identifier.epage5en_US
dc.subject.keywordsCarbon Nanomaterialsen_US
dc.subject.keywordsThrough-Silicon Viasen_US
dc.citation.conferencelocationSingaporeen_US
dc.description.acknowledgementThis work is supported by MOE Tier-2 grant #MOE2014- T2-2-105 (ARC22/15).en_US
item.grantfulltextopen-
item.fulltextWith Fulltext-
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