Please use this identifier to cite or link to this item:
https://hdl.handle.net/10356/152096
Title: | An energy-efficient convolution unit for depthwise separable convolutional neural networks | Authors: | Chong, Yi Sheng Goh, Wang Ling Ong, Yew-Soon Nambiar, Vishnu P. Do, Anh Tuan |
Keywords: | Engineering::Electrical and electronic engineering | Issue Date: | 2021 | Source: | Chong, Y. S., Goh, W. L., Ong, Y., Nambiar, V. P. & Do, A. T. (2021). An energy-efficient convolution unit for depthwise separable convolutional neural networks. 2021 IEEE International Symposium on Circuits and Systems (ISCAS), 2021-May, 1-5. https://dx.doi.org/10.1109/ISCAS51556.2021.9401192 | Conference: | 2021 IEEE International Symposium on Circuits and Systems (ISCAS) | Abstract: | High performance but computationally expensive Convolutional Neural Networks (CNNs) require both algorithmic and custom hardware improvement to reduce model size and to improve energy efficiency for edge computing applications. Recent CNN architectures employ depthwise separable convolution to reduce the total number of weights and MAC operations. However, depthwise separable convolution workload does not run efficiently in existing CNN accelerators. This paper proposes an energy-efficient CONV unit for pointwise and depthwise operation. The CONV unit utilizes weight stationary to enable high efficiency. The row partial sum reduction is engaged to increase parallelism in pointwise convolution thereby lightening the memory requirements on output partial sums. Our design achieves a maximum efficiency of 3.17 TOPS/W at 0.85V/40nm CMOS which is well-suited for energy constrained edge computing applications. | URI: | https://hdl.handle.net/10356/152096 | ISBN: | 9781728192017 | DOI: | 10.1109/ISCAS51556.2021.9401192 | Schools: | Interdisciplinary Graduate School (IGS) School of Electrical and Electronic Engineering School of Computer Science and Engineering |
Organisations: | Institute of Microeletronics, A*STAR | Research Centres: | Energy Research Institute @ NTU (ERI@N) | Rights: | © 2021 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: https://doi.org/10.1109/ISCAS51556.2021.9401192 | Fulltext Permission: | open | Fulltext Availability: | With Fulltext |
Appears in Collections: | IGS Conference Papers |
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ISCAS2021 An_Accelerator_for_Depthwise_Separable_CNN_Final.pdf | 4.03 MB | Adobe PDF | ![]() View/Open |
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