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https://hdl.handle.net/10356/152163
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DC Field | Value | Language |
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dc.contributor.author | Teh, Jian Sen | en_US |
dc.contributor.author | Arjun, Ramaswami Palaniappan | en_US |
dc.contributor.author | Siek, Liter | en_US |
dc.contributor.author | Zheng, Yuanjin | en_US |
dc.date.accessioned | 2021-07-27T06:18:15Z | - |
dc.date.available | 2021-07-27T06:18:15Z | - |
dc.date.issued | 2016 | - |
dc.identifier.citation | Teh, J. S., Arjun, R. P., Siek, L. & Zheng, Y. (2016). Review of pulse generators for gated ring ocillator based Time-to-Digital converters. 2016 International Symposium on Integrated Circuits (ISIC). https://dx.doi.org/10.1109/ISICIR.2016.7829703 | en_US |
dc.identifier.isbn | 978-1-4673-9020-0 | - |
dc.identifier.uri | https://hdl.handle.net/10356/152163 | - |
dc.description.abstract | Pulse generator serves an important role in gated ring oscillator (GRO) based Time-to-Digital converters (TDC) to enable the ring oscillator for the input time difference between two reference timing events. As the resolution of TDC advances to a few picoseconds, the linearity of the pulse generator becomes increasingly important. This paper reviews and compare between pulse generators implemented using a XOR gate, SR latch, phase frequency detector (PFD) and time difference generator (TDG). Simulation results in standard 40nm CMOS technology shows that the TDG is the most suitable pulse generator since it has the best linearity. In terms of power and area, the dynamic PFD is a good alternative. | en_US |
dc.language.iso | en | en_US |
dc.rights | © 2016 Institute of Electrical and Electronics Engineers (IEEE). All rights reserved. | en_US |
dc.subject | Engineering::Electrical and electronic engineering | en_US |
dc.title | Review of pulse generators for gated ring ocillator based Time-to-Digital converters | en_US |
dc.type | Conference Paper | en |
dc.contributor.school | School of Electrical and Electronic Engineering | en_US |
dc.contributor.conference | 2016 International Symposium on Integrated Circuits (ISIC) | en_US |
dc.contributor.research | VIRTUS, IC Design Centre of Excellence | en_US |
dc.identifier.doi | 10.1109/ISICIR.2016.7829703 | - |
dc.subject.keywords | Gated Ring Oscillator | en_US |
dc.subject.keywords | Linearity | en_US |
dc.citation.conferencelocation | Singapore | en_US |
dc.description.acknowledgement | The authors would like to thank MediaTek Singapore for sponsoring this research. | en_US |
item.fulltext | No Fulltext | - |
item.grantfulltext | none | - |
Appears in Collections: | EEE Conference Papers |
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