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https://hdl.handle.net/10356/152169
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DC Field | Value | Language |
---|---|---|
dc.contributor.author | Xiao, Zhekai | en_US |
dc.contributor.author | Bui, Anh Khoa | en_US |
dc.contributor.author | Siek, Liter | en_US |
dc.date.accessioned | 2021-08-05T00:24:52Z | - |
dc.date.available | 2021-08-05T00:24:52Z | - |
dc.date.issued | 2017 | - |
dc.identifier.citation | Xiao, Z., Bui, A. K. & Siek, L. (2017). A switched-capacitor DC-DC converter with embedded fast NMOS-LDOs achieving low noise, low output voltage ripple and fast response. 2016 International Symposium on Integrated Circuits (ISIC), 1-4. https://dx.doi.org/10.1109/ISICIR.2016.7829698 | en_US |
dc.identifier.isbn | 9781467390194 | - |
dc.identifier.uri | https://hdl.handle.net/10356/152169 | - |
dc.description.abstract | This paper presents a 2/3 step-down switched-capacitor DC-DC converter with integrated NMOS-LDOs in both charging and discharging phases to suppress the output voltage ripple. A gate driving technique implementing adaptive gate slope and gate pre-charge is proposed to reduce the switching noise during phase transitions and assist the turn-on of the regulation transistors, respectively. Good load regulation and fast transient response are achieved due to the high open loop gain and bandwidth. Simulation results show that the output voltage ripple is less than 0.5 mV when delivering 100 mA output current. The converter achieves peak efficiency of 83.3% and over 80% across a load current range of 5 mA to 130 mA. | en_US |
dc.language.iso | en | en_US |
dc.rights | © 2016 IEEE. All rights reserved. | en_US |
dc.subject | Engineering::Electrical and electronic engineering | en_US |
dc.title | A switched-capacitor DC-DC converter with embedded fast NMOS-LDOs achieving low noise, low output voltage ripple and fast response | en_US |
dc.type | Conference Paper | en |
dc.contributor.school | School of Electrical and Electronic Engineering | en_US |
dc.contributor.conference | 2016 International Symposium on Integrated Circuits (ISIC) | en_US |
dc.contributor.research | VIRTUS, IC Design Centre of Excellence | en_US |
dc.identifier.doi | 10.1109/ISICIR.2016.7829698 | - |
dc.identifier.scopus | 2-s2.0-85013772606 | - |
dc.identifier.spage | 1 | en_US |
dc.identifier.epage | 4 | en_US |
dc.subject.keywords | Switched-capacitor DC-DC Converter | en_US |
dc.subject.keywords | Embedded Fast NMOS-LDO | en_US |
dc.subject.keywords | Low Noise Voltage Ripple | en_US |
dc.subject.keywords | Low Output Voltage Ripple | en_US |
dc.subject.keywords | Gate Driving Technique | en_US |
dc.subject.keywords | Adaptive Gate Slope | en_US |
dc.subject.keywords | Gate Pre-charge | en_US |
dc.subject.keywords | Fast Transient Response | en_US |
dc.citation.conferencelocation | Singapore | en_US |
item.fulltext | No Fulltext | - |
item.grantfulltext | none | - |
Appears in Collections: | EEE Conference Papers |
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