Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/153344
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dc.contributor.authorWang, Youen_US
dc.contributor.authorPrice, Hannah Men_US
dc.contributor.authorZhang, Baileen_US
dc.contributor.authorChong, Yidongen_US
dc.date.accessioned2021-11-25T08:55:07Z-
dc.date.available2021-11-25T08:55:07Z-
dc.date.issued2020-
dc.identifier.citationWang, Y., Price, H. M., Zhang, B. & Chong, Y. (2020). Circuit implementation of a four-dimensional topological insulator. Nature Communications, 11(1), 2356-. https://dx.doi.org/10.1038/s41467-020-15940-3en_US
dc.identifier.issn2041-1723en_US
dc.identifier.urihttps://hdl.handle.net/10356/153344-
dc.description.abstractThe classification of topological insulators predicts the existence of high-dimensional topological phases that cannot occur in real materials, as these are limited to three or fewer spatial dimensions. We use electric circuits to experimentally implement a four-dimensional (4D) topological lattice. The lattice dimensionality is established by circuit connections, and not by mapping to a lower-dimensional system. On the lattice's three-dimensional surface, we observe topological surface states that are associated with a nonzero second Chern number but vanishing first Chern numbers. The 4D lattice belongs to symmetry class AI, which refers to time-reversal-invariant and spinless systems with no special spatial symmetry. Class AI is topologically trivial in one to three spatial dimensions, so 4D is the lowest possible dimension for achieving a topological insulator in this class. This work paves the way to the use of electric circuits for exploring high-dimensional topological models.en_US
dc.description.sponsorshipMinistry of Education (MOE)en_US
dc.language.isoenen_US
dc.relationMOE2016-T3-1-006en_US
dc.relationRG187/18en_US
dc.relationRG174/16(S)en_US
dc.relationMOE2018-T2-1-022 (S)en_US
dc.relation.ispartofNature Communicationsen_US
dc.relation.uri10.21979/N9/KXL3TDen_US
dc.rights© 2020 The Author(s). This article is licensed under a Creative Commons Attribution 4.0 International License, which permits use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons license, and indicate if changes were made. The images or other third party material in this article are included in the article’s Creative Commons license, unless indicated otherwise in a credit line to the material. If material is not included in the article’s Creative Commons license and your intended use is not permitted by statutory regulation or exceeds the permitted use, you will need to obtain permission directly from the copyright holder. To view a copy of this license, visit http://creativecommons.org/ licenses/by/4.0/.en_US
dc.subjectScience::Physicsen_US
dc.titleCircuit implementation of a four-dimensional topological insulatoren_US
dc.typeJournal Articleen
dc.contributor.schoolSchool of Physical and Mathematical Sciencesen_US
dc.contributor.researchCentre for Disruptive Photonic Technologies (CDPT)en_US
dc.identifier.doi10.1038/s41467-020-15940-3-
dc.description.versionPublished versionen_US
dc.identifier.pmid32398727-
dc.identifier.scopus2-s2.0-85084512785-
dc.identifier.issue1en_US
dc.identifier.volume11en_US
dc.identifier.spage2356en_US
dc.subject.keywordsTopological Insulatorsen_US
dc.subject.keywordsQuantum Hallen_US
dc.description.acknowledgementThis work was supported by the Singapore MOE Academic Research Fund Tier 3 Grant MOE2016-T3-1-006, Tier 1 Grants RG187/18 and RG174/16(S), and Tier 2 Grant MOE2018-T2-1-022(S). H.M.P. is supported by the Royal Society via grants UF160112, RGF/EA/180121 and RGF/R1/180071en_US
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