LTspice implementation of PKU compact model of metal-oxide-based RRAM : part A simulation of DC current-voltage characteristics of RRAM device

Abstract

Resistive-switching random access memory (RRAM) is a kind of nonvolatile memory (NVM) that is based on resistance changes to store data. The concept is not new, but the interest of IC industry in RRAM has been grown during recent years due to RRAM’s potential advantages of high density, high speed, and low power consumption. Because of its considerable prospect of miniaturization, RRAM is a promising candidate among emerging NVMs as other NVMs such as FeRAM and MRAM have difficulties in reducing their size further. In this thesis, a physics-based compact model of metal oxide-based RRAM cell, which was developed by the PKU research team, is implemented in LTspice for RRAM device simulation. The I-V characteristics of the high-/low-resistance state of RRAM under DC sweep mode in both SET and RESET processes have been successfully produced by the simulation. The simulation result basically agrees with the typical experimental observation reported by the PKU research team. The impact of both the compliance current in the SET process and the reset stop voltage in the RESET process has been examined.