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Title: Lightweight key encapsulation using LDPC codes on FPGAs
Authors: Hu, Jingwei
Baldi, Marco
Santini, Paolo
Zeng, Neng
Ling, San
Wang, Huaxiong
Keywords: Science::Mathematics
Issue Date: 2020
Source: Hu, J., Baldi, M., Santini, P., Zeng, N., Ling, S. & Wang, H. (2020). Lightweight key encapsulation using LDPC codes on FPGAs. IEEE Transactions On Computers, 69(3), 327-341.
Project: MOE2016-T2-2-014(S)
Journal: IEEE Transactions on Computers
Abstract: In this paper, we present a lightweight hardware design for a recently proposed quantum-safe key encapsulation mechanism based on QC-LDPC codes called LEDAkem, which has been admitted as a round-2 candidate to the NIST post-quantum standardization project. Existing implementations focus on high speed while few of them take into account area or power efficiency, which are particularly decisive for low-cost or power constrained IoT applications. The solution we propose aims at maximizing the metric of area efficiency by rotating the QC-LDPC code representations amongst the block RAMs in digit level. Moreover, optimized parallelized computing techniques, lazy accumulation and block partition are exploited to improve key decapsulation in terms of area and timing efficiency. We show for instance that our area-optimized implementation for 128-bit security requires 6.82× 1056.82×105 cycles and 2.26× 1062.26×106 cycles to encapsulate and decapsulate a shared secret, respectively. The area-optimized design uses only 39 slices (3 percent of the available logic) and 809 slices (39 percent of the available logic) for key encapsulation and key decapsulation respectively, on a small-size low-end Xilinx Spartan-6 FPGA.
ISSN: 0018-9340
DOI: 10.1109/TC.2019.2948323
Rights: © 2019 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
Fulltext Permission: none
Fulltext Availability: No Fulltext
Appears in Collections:SPMS Journal Articles

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