Please use this identifier to cite or link to this item:
|Title:||Comparative analysis of IGBT parameters variation under different accelerated aging tests||Authors:||Sathik, Mohamed Halick Mohamed
|Keywords:||Engineering::Electrical and electronic engineering||Issue Date:||2020||Source:||Sathik, M. H. M., Sundararajan, P., Sasongko, F., Pou, J. & Natarajan, S. (2020). Comparative analysis of IGBT parameters variation under different accelerated aging tests. IEEE Transactions On Electron Devices, 67(3), 1098-1105. https://dx.doi.org/10.1109/TED.2020.2968617||Journal:||IEEE Transactions on Electron Devices||Abstract:||Power semiconductor devices are vulnerable to thermomechanical fatigue due to temperature cycling caused by system load profile and external climatic conditions. As the reliability performance of power semiconductor devices in power converter systems is determined by this temperature stress, accelerated power or thermal cycling test are used in this article to emulate the temperature stress. The failure mechanisms due to temperature stress can be studied, and it also helps to develop the lifetime estimation model for power semiconductor devices. In the past, active power cycling and passive thermal cycling tests are investigated separately to develop the failure mechanism model based on the device's electrical parameter changes and scanning electron microscopic (SEM) analysis. However, there is no detailed report on, how different temperature stresses emulated by dc, pulsewidth modulation (PWM) power cycling, and thermal cycling affects the device physically, and how much changes it introduces in the device's electrical parameters. Therefore, this article presents an experimental investigation of active dc, PWM power cycling and passive thermal cycling approaches on 1.2-kV 50-A fast trench insulated gate bipolar junction transistor (IGBT) devices. The device electrical parameters, such as ON-state voltage, threshold voltage, gate current, gate voltage, and thermal resistance, were monitored during the study to classify the effects of temperature stress produced by dc, PWM power cycling, and thermal cycling on these electrical parameters.||URI:||https://hdl.handle.net/10356/154475||ISSN:||0018-9383||DOI:||10.1109/TED.2020.2968617||Rights:||© 2020 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.||Fulltext Permission:||none||Fulltext Availability:||No Fulltext|
|Appears in Collections:||EEE Journal Articles|
Updated on Jan 21, 2022
Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.