Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/155572
Title: ZeroBN : learning compact neural networks for latency-critical edge systems
Authors: Huai, Shuo
Zhang, Lei
Liu, Di
Liu, Weichen
Subramaniam, Ravi
Keywords: Engineering::Computer science and engineering::Computing methodologies::Artificial intelligence
Issue Date: 2021
Source: Huai, S., Zhang, L., Liu, D., Liu, W. & Subramaniam, R. (2021). ZeroBN : learning compact neural networks for latency-critical edge systems. 2021 58th ACM/IEEE Design Automation Conference (DAC), 151-156. https://dx.doi.org/10.1109/DAC18074.2021.9586309
Project: I1801E0028 
Conference: 2021 58th ACM/IEEE Design Automation Conference (DAC)
Abstract: Edge devices have been widely adopted to bring deep learning applications onto low power embedded systems, mitigating the privacy and latency issues of accessing cloud servers. The increasingly computational demand of complex neural network models leads to large latency on edge devices with limited resources. Many application scenarios are real-time and have a strict latency constraint, while conventional neural network compression methods are not latency-oriented. In this work, we propose a novel compact neural networks training method to reduce the model latency on latency-critical edge systems. A latency predictor is also introduced to guide and optimize this procedure. Coupled with the latency predictor, our method can guarantee the latency for a compact model by only one training process. The experiment results show that, compared to state-of-the-art model compression methods, our approach can well-fit the 'hard' latency constraint by significantly reducing the latency with a mild accuracy drop. To satisfy a 34ms latency constraint, we compact ResNet-50 with 0.82% of accuracy drop. And for GoogLeNet, we can even increase the accuracy by 0.3%
URI: https://hdl.handle.net/10356/155572
ISBN: 9781665432740
DOI: 10.1109/DAC18074.2021.9586309
DOI (Related Dataset): 10.21979/N9/IRNJ4I
Schools: School of Computer Science and Engineering 
Research Centres: HP-NTU Digital Manufacturing Corporate Lab
Rights: ©2021 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: https://doi.org/10.1109/DAC18074.2021.9586309.
Fulltext Permission: open
Fulltext Availability: With Fulltext
Appears in Collections:SCSE Conference Papers

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