Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/156372
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dc.contributor.authorKang, Yuyeen_US
dc.contributor.authorXu, Shengqiangen_US
dc.contributor.authorHan, Kaizhenen_US
dc.contributor.authorKong, Eugene Y.-J.en_US
dc.contributor.authorSong, Zhigangen_US
dc.contributor.authorLuo, Shengen_US
dc.contributor.authorKumar, Annieen_US
dc.contributor.authorWang, Chengkuanen_US
dc.contributor.authorFan, Weijunen_US
dc.contributor.authorLiang, Gengchiauen_US
dc.contributor.authorGong, Xiaoen_US
dc.date.accessioned2022-04-17T12:44:53Z-
dc.date.available2022-04-17T12:44:53Z-
dc.date.issued2021-
dc.identifier.citationKang, Y., Xu, S., Han, K., Kong, E. Y., Song, Z., Luo, S., Kumar, A., Wang, C., Fan, W., Liang, G. & Gong, X. (2021). Ge₀.₉₅Sn₀.₀₅ gate-all-around p-channel metal-oxide-semiconductor field-effect transistors with sub-3 nm nanowire width. Nano Letters, 21(13), 5555-5563. https://dx.doi.org/10.1021/acs.nanolett.1c00934en_US
dc.identifier.issn1530-6984en_US
dc.identifier.urihttps://hdl.handle.net/10356/156372-
dc.description.abstractWe demonstrate Ge0.95Sn0.05 p-channel gate-all-around field-effect transistors (p-GAAFETs) with sub-3 nm nanowire width (WNW) on a GeSn-on-insulator (GeSnOI) substrate using a top-down fabrication process. Thanks to the excellent gate control by employing an aggressively scaled nanowire structure, Ge0.95Sn0.05 p-GAAFETs exhibit a small subthreshold swing (SS) of 66 mV/decade, a decent on-current/off-current (ION/IOFF) ratio of ∼1.2 × 106, and a high-field effective hole mobility (μeff) of ∼115 cm2/(V s). In addition, we also investigate quantum confinement effects in extremely scaled GeSn nanowires, including threshold voltage (VTH) shift and IOFF reduction with continuous scaling of WNW under 10 nm. The phenomena observed from experimental results are substantiated by the calculation of GeSn bandgap and TCAD simulation of electrical characteristics of devices with sub-10 nm WNW. This study suggests Ge-based nanowire p-FETs with extremely scaled dimension hold promise to deliver good performance to enable further scaling for future technology nodes.en_US
dc.description.sponsorshipNational Research Foundation (NRF)en_US
dc.language.isoenen_US
dc.relationNRF-CRP19-2017-01en_US
dc.relation.ispartofNano Lettersen_US
dc.rights© 2021 American Chemical Society. All rights reserved.en_US
dc.subjectEngineering::Electrical and electronic engineeringen_US
dc.titleGe₀.₉₅Sn₀.₀₅ gate-all-around p-channel metal-oxide-semiconductor field-effect transistors with sub-3 nm nanowire widthen_US
dc.typeJournal Articleen
dc.contributor.schoolSchool of Electrical and Electronic Engineeringen_US
dc.identifier.doi10.1021/acs.nanolett.1c00934-
dc.identifier.pmid34105972-
dc.identifier.scopus2-s2.0-85108643799-
dc.identifier.issue13en_US
dc.identifier.volume21en_US
dc.identifier.spage5555en_US
dc.identifier.epage5563en_US
dc.subject.keywordsNanowireen_US
dc.subject.keywordsGeSnen_US
dc.description.acknowledgementThis work at NUS was supported by Singapore Ministry of Education (MOE) Tier 2 (MOE2018-T2-2-154) and MOE Tier 1 (R-263-000-D65-114). Prof. Fan Weijun acknowledges the support from the National Research Foundation Singapore (NRF-CRP19-2017-01).en_US
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