Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/156375
Title: A pipelined educational simulator for the ARM processor
Authors: Chia, Belinda Wei Qi
Keywords: Engineering::Computer science and engineering::Computer systems organization
Issue Date: 2022
Publisher: Nanyang Technological University
Source: Chia, B. W. Q. (2022). A pipelined educational simulator for the ARM processor. Final Year Project (FYP), Nanyang Technological University, Singapore. https://hdl.handle.net/10356/156375
Project: SCSE21-0474 
Abstract: This paper proposes an approach to implement a pipelined ARM simulator for educational purposes. This simulator allows users to select various data and control hazards settings and display the details of the outcome in the application. Furthermore, there is a pipelined graph shown to illustrate a pipelined architecture. The ARM simulator is built on top of an existing ARM simulator ‘Bicep.js’. ‘Bicep.js’ is an open-source application that allow other programmers to modify and add on features to it. This report provides detailed documentation of the development of the simulator, which includes different aspects, problems faced and the implementation of the simulator.
URI: https://hdl.handle.net/10356/156375
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:SCSE Student Reports (FYP/IA/PA/PI)

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