Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/156579
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dc.contributor.authorYang, Shenghaoen_US
dc.date.accessioned2022-04-20T08:14:19Z-
dc.date.available2022-04-20T08:14:19Z-
dc.date.issued2022-
dc.identifier.citationYang, S. (2022). Running CNN efficiently on a FPGA. Final Year Project (FYP), Nanyang Technological University, Singapore. https://hdl.handle.net/10356/156579en_US
dc.identifier.urihttps://hdl.handle.net/10356/156579-
dc.description.abstractWith increased demand for AI at the edge, there is a pressing need to adapt ever more computationally demanding deep learning models for deployment onto embedded devices. As accelerators for these networks, FPGAs have become preferred for their energy efficiency and adaptability, but models also need to be pre-processed before effective FPGA-based hardware accelerators can be designed. In this project, the author investigates the performance of Block-Balanced Sparsity, a model compression approach that prunes parameter matrices in deep learning networks via a structured manner that allows for efficient FPGA accelerator implementations. By testing this approach across different pruning strategies, the author found that the fine-tuning strategy led to the highest model accuracy, gradual pruning allowed for the fastest model development and learning rate rewinding provided the greatest ease-of-use.en_US
dc.language.isoenen_US
dc.publisherNanyang Technological Universityen_US
dc.subjectEngineering::Computer science and engineeringen_US
dc.titleRunning CNN efficiently on a FPGAen_US
dc.typeFinal Year Project (FYP)en_US
dc.contributor.supervisorWeichen Liuen_US
dc.contributor.schoolSchool of Computer Science and Engineeringen_US
dc.description.degreeBachelor of Engineering (Computer Engineering)en_US
dc.contributor.supervisoremailliu@ntu.edu.sgen_US
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Appears in Collections:SCSE Student Reports (FYP/IA/PA/PI)
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