Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/156845
Title: A 40 GHz CMOS PLL with -75-dBc reference spur and 121.9-fs rms jitter featuring a quadrature sampling phase-frequency detector
Authors: Liang, Yuan
Boon, Chirn Chye
Zhang, Haochi
Tang, Xiao-Lan
Zhang, Qingfeng
Yu, Hao
Keywords: Engineering::Electrical and electronic engineering::Integrated circuits
Issue Date: 2022
Source: Liang, Y., Boon, C. C., Zhang, H., Tang, X., Zhang, Q. & Yu, H. (2022). A 40 GHz CMOS PLL with -75-dBc reference spur and 121.9-fs rms jitter featuring a quadrature sampling phase-frequency detector. IEEE Transactions On Microwave Theory and Techniques, 70(4), 2299-2314. https://dx.doi.org/10.1109/TMTT.2022.3148427
Project: MOE2019-T2-1-114
Journal: IEEE Transactions on Microwave Theory and Techniques
Abstract: The high phase noise (PN) of CMOS millimeter-wave oscillators has encouraged the adoption of wide loop bandwidth for an integer-N phase-locked loop (PLL). This article proposes a quadrature sampling phase-frequency detector (QS-PFD) to disengage the tradeoff between spur rejection and loop bandwidth. With the introduction of an auxiliary path for phase detection, the spur generated by the main path is canceled without incurring extra power or degrading the loop stability. The high gain of the QS-PFD attenuates its jitter contribution to the loop. The QS-PFD enables fast frequency detection and lock detection. Implemented in 40-nm CMOS technology, the proposed PLL shows a -75-dBc reference spur, -101.5-dBc/Hz PN at a 1-MHz offset, and a minimum integrated jitter of 121.9 fs <formula> <tex>$_{{rms}}$</tex> </formula> (10 kHz-100 MHz) at 38.2 GHz with a division ratio of 128. The lock detection time is at the microsecond level. The proposed PLL consumes 23.6 mW from a 1.1-V power supply, leading to a figure of merit (FoM) of -245 dB.
URI: https://hdl.handle.net/10356/156845
ISSN: 0018-9480
DOI: 10.1109/TMTT.2022.3148427
Rights: © 2022 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: https://doi.org/10.1109/TMTT.2022.3148427.
Fulltext Permission: open
Fulltext Availability: With Fulltext
Appears in Collections:EEE Journal Articles

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