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Title: Design and development of multi-level inverter with reduced switch count and voltage boosting capability
Authors: Tan, Andy Jun Ji
Keywords: Engineering::Electrical and electronic engineering::Power electronics
Engineering::Electrical and electronic engineering::Electronic circuits
Issue Date: 2022
Publisher: Nanyang Technological University
Source: Tan, A. J. J. (2022). Design and development of multi-level inverter with reduced switch count and voltage boosting capability. Final Year Project (FYP), Nanyang Technological University, Singapore.
Project: A1046-211
Abstract: An inverter generally converts Direct Current (DC) voltage to Alternating Current (AC) voltage and comprises electronic components or devices operating at a certain frequency or voltage. Inverters are used and categorised in a few ways, with the most common being used as two-level inverter and multi-level inverter (MLI), whereas some are classified as Voltage Source Inverter (VSI) while others are classified as Current Source Inverter (CSI). However, in this project, multi-level inverter will be discussed. The advantages of a multi-level inverter compared to common two-level inverters are their capability of producing higher voltage and power outputs, lower Total Harmonic Distortion (THD), lower switching voltage stress and lower Electromagnetic Interferences (EMI). Such advantages make the MLI feasible for vital applications that are widely used in our energy distribution system like solar panels and uninterruptible power supplies (UPS). The main objective of this project is to design and develop a MLI topology with reduced switch count and voltage boosting capability. This project will discuss the steps taken to design the proposed topology. Simulation results from the topology will also be presented and discussed. Lastly the report will conclude with a conclusion and future work of this project.
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Student Reports (FYP/IA/PA/PI)

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